# RISC-V and RISC Zero

[RISC Zero](https://www.risczero.com/) is a zero knowledge virtual machine based on the [RISC-V](https://en.wikipedia.org/wiki/RISC-V) instruction set. As a blockchain VM, RISC-V's most notable difference from the EVM instruction set is that it's register-based and not stack-based. Additionally: RISC stands for Reduced Instruction Set Computer, meaning RISC-V has a smaller amount of potential operations.

The design challenges section of [Scroll's zkEVM blog post](https://scroll.io/blog/zkEVM#design-challenges-of-zkevm) better covers the implications here. You'll notice that, from the jump, the second to fourth points already don't apply to RISC-V, the first and sixth impact RISC-V to a lesser extent, and Motion's architecture mitigates the fifth.

Without going too heavily into technical details, the above give a RISC-V zkVM key advantages over its counterparts:

1. Lower system requirements: a RISC machine can operate while keeping track of less information. This is ideal for a proving system because less complexity = lower constraint count = less memory and CPU overhead per frame and a wider pool of potential provers.
2. Less specialized development: RISC-V is a general use architecture; a network using it inherits R\&D from a much wider development community. For instance, developer tools like disassemblers, debuggers, compilers, and toolchains already work today. There's very little, if any, catch-up to play on technical maturity.